Application of Neural Network to Improve Dynamic Branch Prediction of Superscalar Microprocessors

Osofisan, P.B. and Afunlehin, O.A. (2007) Application of Neural Network to Improve Dynamic Branch Prediction of Superscalar Microprocessors. Application of Neural Network to Improve Dynamic Branch Prediction of Superscalar Microprocessors, 8 (1). pp. 80-97.

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This research shows that using an Artificial Neural Network as the hardware branch predictor of a superscalar microprocessor leads to performance as good as standard branch predictors for comparable chip area. The results were obtained running several Spec95 benchmarks on an augmented version of the simple-scalar architecture simulator. The approach taken in this research is an attempt to use Neural Networks to improve the design of hardware branch predictors. It points to a combination of static and dynamic techniques using artificial intelligence. The prediction rates achieved by the holistic-non-adaptive Neural Network (NN) predictor designed are promising. Even a simple Neural Network structure without an on-line adaptive mechanism performed better than current techniques for small predictor sizes. The neural net predictor achieved almost the same rates for most of the benchmarks of the Spec95 set and it was even 20% more accurate for one of them. However, the NN predictors developed were not able to achieve the same prediction rates as bigger standard predictor configurations. The performance of the non-adaptive NN predictors substantially decreases when the number of dynamic branches in the benchmark increases, showing that the dynamic characteristic of the benchmarks negatively affects the behaviour of the non-adaptive Neural Network predictor. This indicates that in order to increase the prediction rate in highly dynamic programs it would be necessary to incorporate an adaptive mechanism, to yield Neural Network predictors competitive with the larger standard configurations. The method used in this study was to train an Artificial Neural Network on the dynamics of programs, and particularly conditional branch instructions, when they are being executed in a microprocessor. After training the Neural Network on traces of programs, it was implemented in the simulator to replace the existing standard predictor. In order to achieve better CPU performance, many schemes of branch prediction have been utilized. These schemes sometimes can be categorized as program-based predictors vs. profile based predictors, or static vs. dynamic schemes. This paper focuses on the study of the dynamic branch predictors since the dynamic approach of branch prediction has been developed much more than the static approach of branch prediction. However, their performances always have new and interesting discoveries based on different benchmarks and architectures

Item Type: Article
Subjects: Q Science > QC Physics
Divisions: Faculty of Engineering, Science and Mathematics > School of Engineering Sciences
Depositing User: Mr Adedamola Bameke
Date Deposited: 28 Jun 2020 20:32
Last Modified: 28 Jun 2020 20:32

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